Eecs 388 lab
From ITTC
Contents
- 1 Lab Repository
- 1.1 How to build a basic SoC
- 1.2 GPIOs + Basic MicroBlaze System
- 1.3 ChipScope + IBA + Microblaze System
- 1.4 Custom IP Cores + MicroBlaze System
- 1.5 Encryption Core + MicroBlaze System
- 1.6 MicroBlaze Assembly Programming
- 1.7 UART-based I/O + Assembly
- 1.8 Interrupt Driven MicroBlaze System
- 1.9 Dual-Core Microblaze System
- 1.10 Simple "Simon" Game
- 2 Copyright
Lab Repository
How to build a basic SoC
- Lab 1: File:Edk baseSystemBuilder.pdf - Step-by-step instructions on how to build a system using EDK/XPS.
- Project Purpose:
- Introduction to Xilinx toolset.
- Basic system design within EDK.
- Introduction to SW development.
GPIOs + Basic MicroBlaze System
- Lab 2: File:Edk memMapIO.pdf - Step-by-step instructions on how to interact with GPIOs from SW
- File:Pointers.pdf - Basic review of pointer constructs in C
- File:GPIOpointers.c - Example C code of how to interact with GPIOs using pointers
- Project Purpose:
- Basic system design within EDK
- Simple SW development for MicroBlaze
- Simple lesson in memory-mapped I/O via GPIOs
ChipScope + IBA + Microblaze System
- Lab 3: File:Edk chipscope.pdf - Step-by-step instructions on how to use ChipScope and the Integrated Bus Analyzer.
- File:AddBRAM.doc - Step-by-step instructions on how to add memory to the OPB bus.
- OPB Bus Structure - OPB v2.0 Documentation
- Project Purpose:
- Introduction to ChipScope Pro toolset
- How to monitor and debug hardware in real-time
Custom IP Cores + MicroBlaze System
- Lab 4: File:Edk customCores.pdf - Step-by-step instructions on how to create/use custom IP cores using EDK/XPS.
- File:CustomIP.pdf - Detailed step-by-step instructions on how to create/add/use Custom IP cores within EDK.
- File:ProjectPermissions.doc - Instructions on how to setup project permissions for XPS.
- Project Purpose:
- Demonstrate how to create custom OPB-based IP cores
- How to communicate with memory-mapped devices
Encryption Core + MicroBlaze System
- File:NewEncryptTest.zip - Use this system!! (the encryption core is already in the project, all that is needed is SW)
- Lab 5: File:CustomIP encryption.pdf - Create a system that interacts with a custom encryption IP core.
- File:User logic.vhd - Modified user logic file that implements Caesar Cipher Encryption.
- Project Purpose:
- How to interact with a simple HW-based accelerator
- How to write SW drivers for memory-mapped devices.
MicroBlaze Assembly Programming
- Lab 6: File:Assembly.pdf - A small introduction to programming control structures in the MicroBlaze ISA
- MicroBlaze ISA - MicroBlaze ISA Documentation
- File:AssemblyTest.s - Simple MicroBlaze assembly program
- Uses the pre-defined "print" and "xil_printf"
- Uses a control loop with a decrementing variable
- Project Purpose:
- Learn the MicroBlaze ISA
- How to write control structures in assembly languages:
- Conditionals (IF-THEN-ELSE)
- Loops (FOR, WHILE)
- Function call semantics
UART-based I/O + Assembly
- Lab 7: File:UART Lab Instr.doc - UART-based I/O Lab Instructions
- OPB-UARTLITE - IP Core Documentation
- File:HintsUART.txt - Hints on how the UART works and how to interact with it.
- Project Purpose:
- Learn how to communicate with a UART
- Learn the MicroBlaze ISA
- Learn how to write a simple output driver
Interrupt Driven MicroBlaze System
- Lab 8: File:Edk interrupts.doc - (DOC) Step-by-step instructions on how to create interrupt-based systems.
- File:Edk interrupts.pdf - (PPT) Step-by-step instructions on how to create interrupt-based systems.
- Project Purpose:
- Demonstrate how to connect HW devices up to CPU's interrupt ports
- How to write interrupt handlers
- How to configure MicroBlaze interrupts
- How to setup/configure an interrupt controller
- How to setup/configure bus-based timers
Dual-Core Microblaze System
- Lab 9: File:DualMicroblaze.zip Dual-core MicroBlaze system for the XUP development board
- File:DualCoreMicroblaze.pdf Block diagram of the dual-core MicroBlaze system
- Project Purpose:
- Introduction to MPSoC
- How to build/program an FPGA-based multiprocessor system (with MicroBlaze CPUs)
- Introduction to FSLs (MB's co-processor interface)
- Introduction to message-passing
- Introduction to MPSoC
Simple "Simon" Game
- Lab 10: ??? - Create a custom application on the XUP
- File:Simon.tar.gz MicroBlaze SoC implementing the "simon" game
- Project Purpose:
- How to interact with memory-mapped peripherals:
- LEDs, Buttons, and AC-97 Codec (Beep Function)
- Application development for MicroBlaze
- How to interact with memory-mapped peripherals:
Copyright
All lab materials created by Jason Agron (Summer, 2007). Feel free to use the labs for educational purposes, but please give credit to Jason and the CSDL lab at the University of Kansas.
